[UFO Chicago] Meeting Followup--FPGAs
Neil R. Ormos
ormos at ripco.com
Mon Dec 12 12:29:36 PST 2016
At last night's UFO meeting, we discussed the new
Stratix 10 line of high-end field-programmable
gate arrays (FPGAs) from Altera (now Intel). One
question asked was (paraphrased) "What sort of
design problem would require an FPGA?"
An example of an inexpensive digital TV
transmitter system that uses an FPGA is described
here:
<https://datv-express.com/uploads/TechTalk109-DATV.pdf>
The transmitter accepts a formatted video data
stream from a separate computer via a USB port,
and performs modulation and filtering according to
one of the supported digital TV standards. The
FPGA is used because a general-purpose CPU would
be too slow, or, if a fast enough CPU were
available, it would be much more expensive. Over
time, the developers have moved some additional
workload from the separate computer into the FPGA.
The FPGA used in the transmitter is a (now) cheap,
low-end FPGA in Altera's Cyclone II product line.
The table below superficially compares that FPGA
with a high-end member of the Stratix V product
line and mid-range member of the new Stratix 10
product line (at least, it's shown on Altera's
roadmap):
Brand LE Blocks Price
----------- ------- ------ ------
Cyclone II: 8256 516 $22
Stratix V: 622000 234720 $8900
Stratix 10: 2005000 679680 ?
The "LE" column refers to the number of "logic
elements" provided in the FPGA. A logic element is
the smallest user-accessible logic unit available
in the FPGA, and is typically a flip-flop or
simple gate. The LEs are organized into groups or
"blocks" containing a relatively small number of
LEs. The "Blocks" column refers to the number of
these available in the FPGA. Connections between
LEs within a block are more numerous, cheaper, and
faster, than those crossing block
boundaries. Where possible, the toolchain that
converts the designer's representation of the
design into the data used to program the FPGA
assigns the LEs used to implement related logic
from the same block.
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